1. Field of the Invention
The present invention generally relates to image sensing systems and more particularly relates to integrated circuit architecture of contact image sensors for generating bi-level or binary images in real time. Images from image sensing systems employing the present invention can be analyzed, archived or transmitted efficiently in applications that rely on binary images, such as check payment verification and optical character recognition.
2. Description of the Related Art
There are many applications that need an imaging system to convert a target to an electronic format that can be subsequently analyzed, printed, distributed or archived. The electronic format is generally a digital image of the target. A typical example of the imaging system is a scanner and the target is a sheet of paper from a book or an article. Through the scanner, an electronic or digital image of the paper is generated and subsequently may be analyzed, computed, or transmitted through the Internet.
An imaging system generally includes an image sensing module that converts a target optically into an image. The key element in the sensing module that converts the target optically to the image is an image sensor comprising an array of photodetectors responsive to light impinged upon the image sensor. Each of the photodetectors produces an electronic signal representing the intensity of light reflected from the target. The electronic signals from all the photodetectors are readout as a video signal that is then digitized through an analog-to-digital converter to produce a digital signal or an image of the target.
FIG. 1A illustrates a configuration system 100 that has been used for the past tens of years. A scanning document 110 that can be a page from an article or book is scanned in by an image sensing system 111 that can be a scanner, such as SCANJET 4100CSE Color Scanner from Hewlett Packard. The output of the scanner is typically a digital image 114 of scanning document 110. Scanner 111 includes an image sensor 112 and an analog-to-digital converter 115. Image sensor 112 generates images 117 that are typically digitized to gray scale or color images of 8-bit precision. Binalization process 116 receives and converts Image 114 to binary Image 118 that is a preferred form for data analysis and understanding in data process 120. Binalization process 116 Is typically implemented in a separate circuit or a software application. The separate circuit may be implemented in a post-processing circuit coupled to A/D converter 115 and the software application may be embedded in a scanner driver or provided in a commercial image editing software, such as Adobe PhotoShop, running in a host computer 119.
FIG. 1B depicts a contact image sensor (CIS) system that can; be used in image sensor 112 of FIG 1A. Scanning document 110 is illuminated by an illumination source 121. Reflected light from scanning document 110 is collected and focused by a full-width rod-lens system 122. The CIS system allows one-to-one scanning of the document because rod lens 122 and an image sensor chip 124 are of the same width as (or greater width than) scanning document 110.
FIG. 1C is a functional block diagram of image sensor 112, along with FIG. 1D showing some detail of the construction of image sensor array 126. To be specific, a plurality of individual sensor chips 130 are butted end-to-end on a single substrate. Each of the individual sensor chips comprises a plurality of photodetectors 128 arranged in a row. In operation, image sensor array 126 is triggered by a start pulse to the first-in-sequence individual sensor chip 130 which serially activates the photodetectors on the first individual sensor chip 130. After the signal from the last photodetector element of the first individual sensor chip 130 is read, an end-of-scan pulse is generated so that the next sensor chip in sequence is triggered.
The number of individual sensor chips chosen is dependent upon the desired width of scanning. Sensor array 126 also comprises necessary circuits to serially activate the individual chips and to readout signals generated from photodetectors. The strength of the signals is directly proportionate to the reflected light from the scanning document. To preserve the contents in the scanning document, most CIS systems produce signals that are subsequently digitized to 8 or 12 bit data by a following analog-to-digital (A/D) converter.
In many imaging applications, such as check verification at checkout counters in a retail store and document archival, the primary interest is to extract texture information from captured images, for example, for optical character recognition (OCR). To be applicable for such process, the images are preferably in binary format, namely the texture information in black and the background in white or vice versa. In other words, the digitized signals from the A/D converter must be binalized.
Considering the cost and processes associated with the subsequent binary images obtained, it will be desirable that a CIS generates directly binary images. Further, the cost of such CIS will be dramatically reduced if it employs no A/D converters to convert a gray-scale image to a bi-level image. A CIS with high performance, low cost and capable of generating the bi-level images will be very well received in the market.
The present invention has been made in consideration of the above described problems and needs and has particular applications to image systems, such as scanners, digital cameras and computer vision systems. One of the advantages and benefits in the present inventions is the increased performance and reduced cost provided in the underlying architecture. Image sensing modules, especially those contact image sensors, employing the current invention can be effectively used in many imaging applications such as the check verification in checkout counters of retail stores or banks and document archival systems in which binary or bi-level images are preferred.
According to one aspect of the present invention, an image sensing module comprises an image sensor, an amplifier, an analyzing circuit and a comparator. In one particular embodiment, the image sensing module further comprises an electrically erasable programmable read-only memory (EEPROM). The image sensor comprising a number of sensor chips concatenated in series produces a video signal. Each of the sensor chips comprises a plurality of photodetectors; each of the photodetectors producing an electronic signal when the image sensor is activated. In other words, the video signal comprises electronic signals respectively from all the photodetectors in the image sensor.
The amplifier is coupled to the image sensor and receives the electronic signals. The amplifier further receives pairs of gain and offset from a memory or the EEPROM. The electronic signals are adjusted in the amplifier respectively and sequentially in accordance to the pairs of gain and offset;
The analyzing circuit is coupled to the amplifier and receives the adjusted electronic signals. The analyzing circuit produces threshold values from the electronic signals according to a threshold determination procedure. The comparator receives the adjusted electronic signals from the amplifier and the threshold values from the analyzing circuit to generate the bi-level signal from the electronic signals with respect to the threshold values.
The memory or EEPROM is used to store the pairs of predetermined gain and offset; each of the pairs of gain and offset corresponding respectively to one of the photodetectors. In other words, an electronic signals generated from one particular photodetector is registered to be adjusted by a gain and an offset designated to the particular photodetector.
In a preferred embodiment, the amplifier, the analyzing circuit and the comparator are integrated in a substrate that holds the photodetectors. As a result, the real-time binalization-like process is made possible on the one-chip solution. Further the cost of manufacturing image reproduction systems employing the disclosed circuit architecture can be dramatically reduced.
Apart from prior art systems in which a binalization process takes place separately, either in a different circuit or a software process running in a host computer, the circuit architecture in the present invention does not binalize a digital gray-scale image to a digital binary image rather binalize an adjusted video signal based on a real-time supplied dynamic threshold.
According to another aspect of the present invention, the present invention is a method for generating bi-level signals in real time, the method comprising:
producing a video signal from an image sensor comprising a plurality of photodetectors, each of said photodetectors respectively producing an electronic signal when said image sensor is activated; wherein said video signal comprises electronic signals from all of said photodetectors;
adjusting each of said electronic signals sequentially in an amplifier with respect to each of groups of parameters to overcome adverse impacts caused by inherent noises from said image sensor; wherein each of said groups of parameters corresponds to one of said photodetectors;
deriving in an analyzing circuit a dynamic threshold from said video signal; and
generating by a comparator a bi-level signal from said video signal in accordance with said dynamic threshold.
Accordingly, one of the objects in the present invention is to provide a contact image sensor providing bi-level image data with high performance and low cost.